--- a/js/src/wasm/WasmBaselineCompile.cpp
+++ b/js/src/wasm/WasmBaselineCompile.cpp
@@ -23,16 +23,39 @@
* - A 32-bit register can be extended in-place to a 64-bit register on 64-bit
* systems.
*
* - Code that knows that Register64 has a '.reg' member on 64-bit systems and
* '.high' and '.low' members on 32-bit systems, or knows the implications
* thereof, is #ifdef JS_PUNBOX64. All other code is #if(n)?def JS_64BIT.
*
*
+ * Coding standards:
+ *
+ * - In "small" code generating functions (eg emitMultiplyF64, emitQuotientI32,
+ * and surrounding functions; most functions fall into this class) where the
+ * meaning is obvious:
+ *
+ * - if there is a single source + destination register, it is called 'r'
+ * - if there is one source and a different destination, they are called 'rs'
+ * and 'rd'
+ * - if there is one source + destination register and another source register
+ * they are called 'r' and 'rs'
+ * - if there are two source registers and a destination register they are
+ * called 'rs0', 'rs1', and 'rd'.
+ *
+ * - Generic temp registers are named /temp[0-9]?/ not /tmp[0-9]?/.
+ *
+ * - Registers can be named non-generically for their function ('rp' for the
+ * 'pointer' register and 'rv' for the 'value' register are typical) and those
+ * names may or may not have an 'r' prefix.
+ *
+ * - "Larger" code generating functions make their own rules.
+ *
+ *
* General status notes:
*
* "FIXME" indicates a known or suspected bug. Always has a bug#.
*
* "TODO" indicates an opportunity for a general improvement, with an additional
* tag to indicate the area of improvement. Usually has a bug#.
*
* There are lots of machine dependencies here but they are pretty well isolated
@@ -3383,49 +3406,49 @@ class BaseCompiler final : public BaseCo
masm.ma_ldr(DTRAddr(scratch, DtrRegImmShift(switchValue, LSL, 2)), pc, Offset,
Assembler::Always);
#else
MOZ_CRASH("BaseCompiler platform hook: tableSwitch");
#endif
}
RegI32 captureReturnedI32() {
- RegI32 rv = RegI32(ReturnReg);
- MOZ_ASSERT(isAvailableI32(rv));
- needI32(rv);
- return rv;
+ RegI32 r = RegI32(ReturnReg);
+ MOZ_ASSERT(isAvailableI32(r));
+ needI32(r);
+ return r;
}
RegI64 captureReturnedI64() {
- RegI64 rv = RegI64(ReturnReg64);
- MOZ_ASSERT(isAvailableI64(rv));
- needI64(rv);
- return rv;
+ RegI64 r = RegI64(ReturnReg64);
+ MOZ_ASSERT(isAvailableI64(r));
+ needI64(r);
+ return r;
}
RegF32 captureReturnedF32(const FunctionCall& call) {
- RegF32 rv = RegF32(ReturnFloat32Reg);
- MOZ_ASSERT(isAvailableF32(rv));
- needF32(rv);
+ RegF32 r = RegF32(ReturnFloat32Reg);
+ MOZ_ASSERT(isAvailableF32(r));
+ needF32(r);
#if defined(JS_CODEGEN_ARM)
if (call.usesSystemAbi && !call.hardFP)
- masm.ma_vxfer(r0, rv);
-#endif
- return rv;
+ masm.ma_vxfer(ReturnReg, r);
+#endif
+ return r;
}
RegF64 captureReturnedF64(const FunctionCall& call) {
- RegF64 rv = RegF64(ReturnDoubleReg);
- MOZ_ASSERT(isAvailableF64(rv));
- needF64(rv);
+ RegF64 r = RegF64(ReturnDoubleReg);
+ MOZ_ASSERT(isAvailableF64(r));
+ needF64(r);
#if defined(JS_CODEGEN_ARM)
if (call.usesSystemAbi && !call.hardFP)
- masm.ma_vxfer(r0, r1, rv);
-#endif
- return rv;
+ masm.ma_vxfer(ReturnReg64.low, ReturnReg64.high, r);
+#endif
+ return r;
}
void returnCleanup(bool popStack) {
if (popStack)
fr.popStackBeforeBranch(controlOutermost().stackHeight);
masm.jump(&returnLabel_);
}
@@ -3949,28 +3972,30 @@ class BaseCompiler final : public BaseCo
if (!check->omitBoundsCheck) {
masm.wasmBoundsCheck(Assembler::AboveOrEqual, ptr,
Address(tls, offsetof(TlsData, boundsCheckLimit)),
trap(Trap::OutOfBounds));
}
#endif
}
- void needLoadTemps(const MemoryAccessDesc& access, RegI32* tmp1, RegI32* tmp2, RegI32* tmp3) {
+ void needLoadTemps(const MemoryAccessDesc& access, RegI32* temp1, RegI32* temp2,
+ RegI32* temp3)
+ {
#if defined(JS_CODEGEN_ARM)
if (IsUnaligned(access)) {
switch (access.type()) {
case Scalar::Float64:
- *tmp3 = needI32();
+ *temp3 = needI32();
MOZ_FALLTHROUGH;
case Scalar::Float32:
- *tmp2 = needI32();
+ *temp2 = needI32();
MOZ_FALLTHROUGH;
default:
- *tmp1 = needI32();
+ *temp1 = needI32();
break;
}
}
#endif
}
MOZ_MUST_USE bool needTlsForAccess(const AccessCheck& check) {
#if defined(JS_CODEGEN_ARM)
@@ -3980,17 +4005,17 @@ class BaseCompiler final : public BaseCo
#else
return false;
#endif
}
// ptr and dest may be the same iff dest is I32.
// This may destroy ptr even if ptr and dest are not the same.
MOZ_MUST_USE bool load(MemoryAccessDesc* access, AccessCheck* check, RegI32 tls, RegI32 ptr,
- AnyReg dest, RegI32 tmp1, RegI32 tmp2, RegI32 tmp3)
+ AnyReg dest, RegI32 temp1, RegI32 temp2, RegI32 temp3)
{
prepareMemoryAccess(access, check, tls, ptr);
#if defined(JS_CODEGEN_X64)
Operand srcAddr(HeapReg, ptr, TimesOne, access->offset());
if (dest.tag == AnyReg::I64)
masm.wasmLoadI64(*access, srcAddr, dest.i64());
@@ -4012,27 +4037,28 @@ class BaseCompiler final : public BaseCo
if (byteRegConflict)
masm.mov(scratch, dest.i32());
}
#elif defined(JS_CODEGEN_ARM)
if (IsUnaligned(*access)) {
switch (dest.tag) {
case AnyReg::I64:
- masm.wasmUnalignedLoadI64(*access, HeapReg, ptr, ptr, dest.i64(), tmp1);
+ masm.wasmUnalignedLoadI64(*access, HeapReg, ptr, ptr, dest.i64(), temp1);
break;
case AnyReg::F32:
- masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f32(), tmp1, tmp2,
+ masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f32(), temp1, temp2,
RegI32::Invalid());
break;
case AnyReg::F64:
- masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f64(), tmp1, tmp2, tmp3);
+ masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f64(), temp1, temp2,
+ temp3);
break;
default:
- masm.wasmUnalignedLoad(*access, HeapReg, ptr, ptr, dest.i32(), tmp1);
+ masm.wasmUnalignedLoad(*access, HeapReg, ptr, ptr, dest.i32(), temp1);
break;
}
} else {
if (dest.tag == AnyReg::I64)
masm.wasmLoadI64(*access, HeapReg, ptr, ptr, dest.i64());
else
masm.wasmLoad(*access, HeapReg, ptr, ptr, dest.any());
}
@@ -4049,28 +4075,28 @@ class BaseCompiler final : public BaseCo
return needI32();
#endif
return RegI32::Invalid();
}
// ptr and src must not be the same register.
// This may destroy ptr and src.
MOZ_MUST_USE bool store(MemoryAccessDesc* access, AccessCheck* check, RegI32 tls, RegI32 ptr,
- AnyReg src, RegI32 tmp)
+ AnyReg src, RegI32 temp)
{
prepareMemoryAccess(access, check, tls, ptr);
// Emit the store
#if defined(JS_CODEGEN_X64)
- MOZ_ASSERT(tmp.isInvalid());
+ MOZ_ASSERT(temp.isInvalid());
Operand dstAddr(HeapReg, ptr, TimesOne, access->offset());
masm.wasmStore(*access, src.any(), dstAddr);
#elif defined(JS_CODEGEN_X86)
- MOZ_ASSERT(tmp.isInvalid());
+ MOZ_ASSERT(temp.isInvalid());
masm.addPtr(Address(tls, offsetof(TlsData, memoryBase)), ptr);
Operand dstAddr(ptr, access->offset());
if (access->type() == Scalar::Int64) {
masm.wasmStoreI64(*access, src.i64(), dstAddr);
} else {
AnyRegister value;
ScratchI8 scratch(*this);
@@ -4089,108 +4115,108 @@ class BaseCompiler final : public BaseCo
}
masm.wasmStore(*access, value, dstAddr);
}
#elif defined(JS_CODEGEN_ARM)
if (IsUnaligned(*access)) {
switch (src.tag) {
case AnyReg::I64:
- masm.wasmUnalignedStoreI64(*access, src.i64(), HeapReg, ptr, ptr, tmp);
+ masm.wasmUnalignedStoreI64(*access, src.i64(), HeapReg, ptr, ptr, temp);
break;
case AnyReg::F32:
- masm.wasmUnalignedStoreFP(*access, src.f32(), HeapReg, ptr, ptr, tmp);
+ masm.wasmUnalignedStoreFP(*access, src.f32(), HeapReg, ptr, ptr, temp);
break;
case AnyReg::F64:
- masm.wasmUnalignedStoreFP(*access, src.f64(), HeapReg, ptr, ptr, tmp);
+ masm.wasmUnalignedStoreFP(*access, src.f64(), HeapReg, ptr, ptr, temp);
break;
default:
- MOZ_ASSERT(tmp.isInvalid());
+ MOZ_ASSERT(temp.isInvalid());
masm.wasmUnalignedStore(*access, src.i32(), HeapReg, ptr, ptr);
break;
}
} else {
- MOZ_ASSERT(tmp.isInvalid());
+ MOZ_ASSERT(temp.isInvalid());
if (access->type() == Scalar::Int64)
masm.wasmStoreI64(*access, src.i64(), HeapReg, ptr, ptr);
else if (src.tag == AnyReg::I64)
masm.wasmStore(*access, AnyRegister(src.i64().low), HeapReg, ptr, ptr);
else
masm.wasmStore(*access, src.any(), HeapReg, ptr, ptr);
}
#else
MOZ_CRASH("BaseCompiler platform hook: store");
#endif
return true;
}
template<typename T>
void
- atomicRMW32(T srcAddr, Scalar::Type viewType, AtomicOp op, RegI32 rv, RegI32 rd, RegI32 tmp)
+ atomicRMW32(T srcAddr, Scalar::Type viewType, AtomicOp op, RegI32 rv, RegI32 rd, RegI32 temp)
{
switch (viewType) {
case Scalar::Uint8: {
#ifdef JS_CODEGEN_X86
// The temp, if used, must be a byte register.
- MOZ_ASSERT(tmp.isInvalid());
+ MOZ_ASSERT(temp.isInvalid());
ScratchI8 scratch(*this);
if (op != AtomicFetchAddOp && op != AtomicFetchSubOp)
- tmp = scratch;
+ temp = scratch;
#endif
switch (op) {
- case AtomicFetchAddOp: masm.atomicFetchAdd8ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchSubOp: masm.atomicFetchSub8ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchAndOp: masm.atomicFetchAnd8ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchOrOp: masm.atomicFetchOr8ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchXorOp: masm.atomicFetchXor8ZeroExtend(rv, srcAddr, tmp, rd); break;
+ case AtomicFetchAddOp: masm.atomicFetchAdd8ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchSubOp: masm.atomicFetchSub8ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchAndOp: masm.atomicFetchAnd8ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchOrOp: masm.atomicFetchOr8ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchXorOp: masm.atomicFetchXor8ZeroExtend(rv, srcAddr, temp, rd); break;
default: MOZ_CRASH("No such op");
}
break;
}
case Scalar::Uint16: {
switch (op) {
- case AtomicFetchAddOp: masm.atomicFetchAdd16ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchSubOp: masm.atomicFetchSub16ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchAndOp: masm.atomicFetchAnd16ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchOrOp: masm.atomicFetchOr16ZeroExtend(rv, srcAddr, tmp, rd); break;
- case AtomicFetchXorOp: masm.atomicFetchXor16ZeroExtend(rv, srcAddr, tmp, rd); break;
+ case AtomicFetchAddOp: masm.atomicFetchAdd16ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchSubOp: masm.atomicFetchSub16ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchAndOp: masm.atomicFetchAnd16ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchOrOp: masm.atomicFetchOr16ZeroExtend(rv, srcAddr, temp, rd); break;
+ case AtomicFetchXorOp: masm.atomicFetchXor16ZeroExtend(rv, srcAddr, temp, rd); break;
default: MOZ_CRASH("No such op");
}
break;
}
case Scalar::Int32:
case Scalar::Uint32: {
switch (op) {
- case AtomicFetchAddOp: masm.atomicFetchAdd32(rv, srcAddr, tmp, rd); break;
- case AtomicFetchSubOp: masm.atomicFetchSub32(rv, srcAddr, tmp, rd); break;
- case AtomicFetchAndOp: masm.atomicFetchAnd32(rv, srcAddr, tmp, rd); break;
- case AtomicFetchOrOp: masm.atomicFetchOr32(rv, srcAddr, tmp, rd); break;
- case AtomicFetchXorOp: masm.atomicFetchXor32(rv, srcAddr, tmp, rd); break;
+ case AtomicFetchAddOp: masm.atomicFetchAdd32(rv, srcAddr, temp, rd); break;
+ case AtomicFetchSubOp: masm.atomicFetchSub32(rv, srcAddr, temp, rd); break;
+ case AtomicFetchAndOp: masm.atomicFetchAnd32(rv, srcAddr, temp, rd); break;
+ case AtomicFetchOrOp: masm.atomicFetchOr32(rv, srcAddr, temp, rd); break;
+ case AtomicFetchXorOp: masm.atomicFetchXor32(rv, srcAddr, temp, rd); break;
default: MOZ_CRASH("No such op");
}
break;
}
default: {
MOZ_CRASH("Bad type for atomic operation");
}
}
}
// On x86, V is Address. On other platforms, it is Register64.
// T is BaseIndex or Address.
template <typename T, typename V>
void
- atomicRMW64(const T& srcAddr, AtomicOp op, V value, Register64 tmp, Register64 rd) {
+ atomicRMW64(const T& srcAddr, AtomicOp op, V value, Register64 temp, Register64 rd) {
switch (op) {
- case AtomicFetchAddOp: masm.atomicFetchAdd64(value, srcAddr, tmp, rd); break;
- case AtomicFetchSubOp: masm.atomicFetchSub64(value, srcAddr, tmp, rd); break;
- case AtomicFetchAndOp: masm.atomicFetchAnd64(value, srcAddr, tmp, rd); break;
- case AtomicFetchOrOp: masm.atomicFetchOr64(value, srcAddr, tmp, rd); break;
- case AtomicFetchXorOp: masm.atomicFetchXor64(value, srcAddr, tmp, rd); break;
+ case AtomicFetchAddOp: masm.atomicFetchAdd64(value, srcAddr, temp, rd); break;
+ case AtomicFetchSubOp: masm.atomicFetchSub64(value, srcAddr, temp, rd); break;
+ case AtomicFetchAndOp: masm.atomicFetchAnd64(value, srcAddr, temp, rd); break;
+ case AtomicFetchOrOp: masm.atomicFetchOr64(value, srcAddr, temp, rd); break;
+ case AtomicFetchXorOp: masm.atomicFetchXor64(value, srcAddr, temp, rd); break;
default: MOZ_CRASH("No such op");
}
}
template<typename T>
void
atomicCmpXchg32(T srcAddr, Scalar::Type viewType, RegI32 rexpect, RegI32 rnew, RegI32 rd)
{
@@ -4558,17 +4584,17 @@ class BaseCompiler final : public BaseCo
# endif
};
#endif // JS_64BIT
friend class PopAtomicRMW32Regs;
class PopAtomicRMW32Regs : public PopBase<RegI32>
{
using Base = PopBase<RegI32>;
- RegI32 rv, tmp;
+ RegI32 rv, temp;
public:
#if defined(JS_CODEGEN_X64) || defined(JS_CODEGEN_X86)
explicit PopAtomicRMW32Regs(BaseCompiler* bc, ValType type, Scalar::Type viewType,
AtomicOp op)
: Base(bc)
{
bc->needI32(bc->specific.eax);
@@ -4589,112 +4615,112 @@ class BaseCompiler final : public BaseCo
rv = bc->popI64ToI32();
else
rv = bc->popI32();
setRd(bc->specific.eax);
# if defined(JS_CODEGEN_X86)
// Single-byte is a special case handled very locally with
// ScratchReg, see atomicRMW32 above.
if (Scalar::byteSize(viewType) > 1)
- tmp = bc->needI32();
+ temp = bc->needI32();
# else
- tmp = bc->needI32();
+ temp = bc->needI32();
# endif
}
}
~PopAtomicRMW32Regs() {
if (rv != bc->specific.eax)
bc->freeI32(rv);
- bc->maybeFreeI32(tmp);
+ bc->maybeFreeI32(temp);
}
#elif defined(JS_CODEGEN_ARM)
explicit PopAtomicRMW32Regs(BaseCompiler* bc, ValType type, Scalar::Type viewType,
AtomicOp op)
: Base(bc)
{
rv = type == ValType::I64 ? bc->popI64ToI32() : bc->popI32();
- tmp = bc->needI32();
+ temp = bc->needI32();
setRd(bc->needI32());
}
~PopAtomicRMW32Regs() {
bc->freeI32(rv);
- bc->freeI32(tmp);
+ bc->freeI32(temp);
}
#else
explicit PopAtomicRMW32Regs(BaseCompiler* bc, ValType type, Scalar::Type viewType,
AtomicOp op)
: Base(bc)
{
MOZ_CRASH("BaseCompiler porting interface: PopAtomicRMW32Regs");
}
#endif
template<typename T>
void
atomicRMW32(T srcAddr, Scalar::Type viewType, AtomicOp op) {
- bc->atomicRMW32(srcAddr, viewType, op, rv, getRd(), tmp);
+ bc->atomicRMW32(srcAddr, viewType, op, rv, getRd(), temp);
}
};
friend class PopAtomicRMW64Regs;
class PopAtomicRMW64Regs : public PopBase<RegI64>
{
using Base = PopBase<RegI64>;
AtomicOp op;
- RegI64 rv, tmp;
+ RegI64 rv, temp;
public:
#if defined(JS_CODEGEN_X64)
explicit PopAtomicRMW64Regs(BaseCompiler* bc, AtomicOp op) : Base(bc), op(op) {
if (op == AtomicFetchAddOp || op == AtomicFetchSubOp) {
// We use xaddq, so input and output must be the same register.
rv = bc->popI64();
setRd(rv);
} else {
// We use a cmpxchgq loop, so the output must be rax.
bc->needI64(bc->specific.rax);
rv = bc->popI64();
- tmp = bc->needI64();
+ temp = bc->needI64();
setRd(bc->specific.rax);
}
}
~PopAtomicRMW64Regs() {
- bc->maybeFreeI64(tmp);
+ bc->maybeFreeI64(temp);
if (op != AtomicFetchAddOp && op != AtomicFetchSubOp)
bc->freeI64(rv);
}
#elif defined(JS_CODEGEN_X86)
// We'll use cmpxchg8b, so rv must be in ecx:ebx, and rd must be
// edx:eax. But we can't reserve ebx here because we need it later, so
- // use a separate tmp and set up ebx when we perform the operation.
+ // use a separate temp and set up ebx when we perform the operation.
explicit PopAtomicRMW64Regs(BaseCompiler* bc, AtomicOp op) : Base(bc), op(op) {
bc->needI32(bc->specific.ecx);
bc->needI64(bc->specific.edx_eax);
- tmp = RegI64(Register64(bc->specific.ecx, bc->needI32()));
- bc->popI64ToSpecific(tmp);
+ temp = RegI64(Register64(bc->specific.ecx, bc->needI32()));
+ bc->popI64ToSpecific(temp);
setRd(bc->specific.edx_eax);
}
~PopAtomicRMW64Regs() {
- bc->freeI64(tmp);
- }
- RegI32 valueHigh() const { return RegI32(tmp.high); }
- RegI32 valueLow() const { return RegI32(tmp.low); }
+ bc->freeI64(temp);
+ }
+ RegI32 valueHigh() const { return RegI32(temp.high); }
+ RegI32 valueLow() const { return RegI32(temp.low); }
#elif defined(JS_CODEGEN_ARM)
explicit PopAtomicRMW64Regs(BaseCompiler* bc, AtomicOp op) : Base(bc) {
// We use a ldrex/strexd loop so the temp and the output must be
// odd/even pairs.
rv = bc->popI64();
- tmp = bc->needI64Pair();
+ temp = bc->needI64Pair();
setRd(bc->needI64Pair());
}
~PopAtomicRMW64Regs() {
bc->freeI64(rv);
- bc->freeI64(tmp);
+ bc->freeI64(temp);
}
#else
explicit PopAtomicRMW64Regs(BaseCompiler* bc, AtomicOp op) : Base(bc) {
MOZ_CRASH("BaseCompiler porting interface: PopAtomicRMW64Regs");
}
#endif
#ifdef JS_CODEGEN_X86
@@ -4703,17 +4729,17 @@ class BaseCompiler final : public BaseCo
atomicRMW64(T srcAddr, AtomicOp op, const V& value, RegI32 ebx) {
MOZ_ASSERT(ebx == js::jit::ebx);
bc->atomicRMW64(srcAddr, op, value, bc->specific.ecx_ebx, getRd());
}
#else
template<typename T>
void
atomicRMW64(T srcAddr, AtomicOp op) {
- bc->atomicRMW64(srcAddr, op, rv, tmp, getRd());
+ bc->atomicRMW64(srcAddr, op, rv, temp, getRd());
}
#endif
};
friend class PopAtomicXchg32Regs;
class PopAtomicXchg32Regs : public PopBase<RegI32>
{
using Base = PopBase<RegI32>;
@@ -4756,17 +4782,17 @@ class BaseCompiler final : public BaseCo
#ifdef JS_CODEGEN_X64
explicit PopAtomicXchg64Regs(BaseCompiler* bc) : Base(bc) {
rv = bc->popI64();
setRd(rv);
}
#elif defined(JS_CODEGEN_X86)
// We'll use cmpxchg8b, so rv must be in ecx:ebx, and rd must be
// edx:eax. But we can't reserve ebx here because we need it later, so
- // use a separate tmp and set up ebx when we perform the operation.
+ // use a separate temp and set up ebx when we perform the operation.
explicit PopAtomicXchg64Regs(BaseCompiler* bc) : Base(bc) {
bc->needI32(bc->specific.ecx);
bc->needI64(bc->specific.edx_eax);
rv = RegI64(Register64(bc->specific.ecx, bc->needI32()));
bc->popI64ToSpecific(rv);
setRd(bc->specific.edx_eax);
@@ -4856,25 +4882,25 @@ class BaseCompiler final : public BaseCo
}
RegI32 popI64ToI32() {
RegI64 r = popI64();
return narrowI64(r);
}
RegI32 popI64ToSpecificI32(RegI32 specific) {
- RegI64 x = widenI32(specific);
- popI64ToSpecific(x);
- return narrowI64(x);
- }
-
- void pushU32AsI64(RegI32 r) {
- RegI64 x = widenI32(r);
- masm.move32To64ZeroExtend(r, x);
- pushI64(x);
+ RegI64 rd = widenI32(specific);
+ popI64ToSpecific(rd);
+ return narrowI64(rd);
+ }
+
+ void pushU32AsI64(RegI32 rs) {
+ RegI64 rd = widenI32(rs);
+ masm.move32To64ZeroExtend(rs, rd);
+ pushI64(rd);
}
RegI32 popMemoryAccess(MemoryAccessDesc* access, AccessCheck* check);
////////////////////////////////////////////////////////////
//
// Sundry helpers.
@@ -5196,157 +5222,157 @@ void
BaseCompiler::emitAddI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.add32(Imm32(c), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.add32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.add32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitAddI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.add64(Imm64(c), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.add64(r1, r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.add64(rs, r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitAddF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- masm.addDouble(r1, r0);
- freeF64(r1);
- pushF64(r0);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
+ masm.addDouble(rs, r);
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitAddF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- masm.addFloat32(r1, r0);
- freeF32(r1);
- pushF32(r0);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
+ masm.addFloat32(rs, r);
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitSubtractI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.sub32(Imm32(c), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.sub32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.sub32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitSubtractI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.sub64(Imm64(c), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.sub64(r1, r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.sub64(rs, r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitSubtractF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- masm.subFloat32(r1, r0);
- freeF32(r1);
- pushF32(r0);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
+ masm.subFloat32(rs, r);
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitSubtractF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- masm.subDouble(r1, r0);
- freeF64(r1);
- pushF64(r0);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
+ masm.subDouble(rs, r);
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitMultiplyI32()
{
- RegI32 r0, r1, reserved;
- pop2xI32ForMulDivI32(&r0, &r1, &reserved);
- masm.mul32(r1, r0);
+ RegI32 r, rs, reserved;
+ pop2xI32ForMulDivI32(&r, &rs, &reserved);
+ masm.mul32(rs, r);
maybeFreeI32(reserved);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
}
void
BaseCompiler::emitMultiplyI64()
{
- RegI64 r0, r1, reserved;
+ RegI64 r, rs, reserved;
RegI32 temp;
- pop2xI64ForMulI64(&r0, &r1, &temp, &reserved);
- masm.mul64(r1, r0, temp);
+ pop2xI64ForMulI64(&r, &rs, &temp, &reserved);
+ masm.mul64(rs, r, temp);
maybeFreeI64(reserved);
maybeFreeI32(temp);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
}
void
BaseCompiler::emitMultiplyF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- masm.mulFloat32(r1, r0);
- freeF32(r1);
- pushF32(r0);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
+ masm.mulFloat32(rs, r);
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitMultiplyF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- masm.mulDouble(r1, r0);
- freeF64(r1);
- pushF64(r0);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
+ masm.mulDouble(rs, r);
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitQuotientI32()
{
int32_t c;
uint_fast8_t power;
if (popConstPositivePowerOfTwoI32(&c, &power, 0)) {
@@ -5357,58 +5383,58 @@ BaseCompiler::emitQuotientI32()
masm.add32(Imm32(c-1), r);
masm.bind(&positive);
masm.rshift32Arithmetic(Imm32(power & 31), r);
pushI32(r);
}
} else {
bool isConst = peekConstI32(&c);
- RegI32 r0, r1, reserved;
- pop2xI32ForMulDivI32(&r0, &r1, &reserved);
+ RegI32 r, rs, reserved;
+ pop2xI32ForMulDivI32(&r, &rs, &reserved);
Label done;
if (!isConst || c == 0)
- checkDivideByZeroI32(r1, r0, &done);
+ checkDivideByZeroI32(rs, r, &done);
if (!isConst || c == -1)
- checkDivideSignedOverflowI32(r1, r0, &done, ZeroOnOverflow(false));
- masm.quotient32(r1, r0, IsUnsigned(false));
+ checkDivideSignedOverflowI32(rs, r, &done, ZeroOnOverflow(false));
+ masm.quotient32(rs, r, IsUnsigned(false));
masm.bind(&done);
maybeFreeI32(reserved);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitQuotientU32()
{
int32_t c;
uint_fast8_t power;
if (popConstPositivePowerOfTwoI32(&c, &power, 0)) {
if (power != 0) {
RegI32 r = popI32();
masm.rshift32(Imm32(power & 31), r);
pushI32(r);
}
} else {
bool isConst = peekConstI32(&c);
- RegI32 r0, r1, reserved;
- pop2xI32ForMulDivI32(&r0, &r1, &reserved);
+ RegI32 r, rs, reserved;
+ pop2xI32ForMulDivI32(&r, &rs, &reserved);
Label done;
if (!isConst || c == 0)
- checkDivideByZeroI32(r1, r0, &done);
- masm.quotient32(r1, r0, IsUnsigned(true));
+ checkDivideByZeroI32(rs, r, &done);
+ masm.quotient32(rs, r, IsUnsigned(true));
masm.bind(&done);
maybeFreeI32(reserved);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitRemainderI32()
{
int32_t c;
uint_fast8_t power;
@@ -5425,56 +5451,56 @@ BaseCompiler::emitRemainderI32()
masm.rshift32Arithmetic(Imm32(power & 31), temp);
masm.lshift32(Imm32(power & 31), temp);
masm.sub32(temp, r);
freeI32(temp);
pushI32(r);
} else {
bool isConst = peekConstI32(&c);
- RegI32 r0, r1, reserved;
- pop2xI32ForMulDivI32(&r0, &r1, &reserved);
+ RegI32 r, rs, reserved;
+ pop2xI32ForMulDivI32(&r, &rs, &reserved);
Label done;
if (!isConst || c == 0)
- checkDivideByZeroI32(r1, r0, &done);
+ checkDivideByZeroI32(rs, r, &done);
if (!isConst || c == -1)
- checkDivideSignedOverflowI32(r1, r0, &done, ZeroOnOverflow(true));
- masm.remainder32(r1, r0, IsUnsigned(false));
+ checkDivideSignedOverflowI32(rs, r, &done, ZeroOnOverflow(true));
+ masm.remainder32(rs, r, IsUnsigned(false));
masm.bind(&done);
maybeFreeI32(reserved);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitRemainderU32()
{
int32_t c;
uint_fast8_t power;
if (popConstPositivePowerOfTwoI32(&c, &power, 1)) {
RegI32 r = popI32();
masm.and32(Imm32(c-1), r);
pushI32(r);
} else {
bool isConst = peekConstI32(&c);
- RegI32 r0, r1, reserved;
- pop2xI32ForMulDivI32(&r0, &r1, &reserved);
+ RegI32 r, rs, reserved;
+ pop2xI32ForMulDivI32(&r, &rs, &reserved);
Label done;
if (!isConst || c == 0)
- checkDivideByZeroI32(r1, r0, &done);
- masm.remainder32(r1, r0, IsUnsigned(true));
+ checkDivideByZeroI32(rs, r, &done);
+ masm.remainder32(rs, r, IsUnsigned(true));
masm.bind(&done);
maybeFreeI32(reserved);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
}
}
#ifndef RABALDR_INT_DIV_I64_CALLOUT
void
BaseCompiler::emitQuotientI64()
{
# ifdef JS_64BIT
@@ -5489,22 +5515,22 @@ BaseCompiler::emitQuotientI64()
masm.add64(Imm64(c-1), r);
masm.bind(&positive);
masm.rshift64Arithmetic(Imm32(power & 63), r);
pushI64(r);
}
} else {
bool isConst = peekConstI64(&c);
- RegI64 r0, r1, reserved;
- pop2xI64ForDivI64(&r0, &r1, &reserved);
- quotientI64(r1, r0, reserved, IsUnsigned(false), isConst, c);
+ RegI64 r, rs, reserved;
+ pop2xI64ForDivI64(&r, &rs, &reserved);
+ quotientI64(rs, r, reserved, IsUnsigned(false), isConst, c);
maybeFreeI64(reserved);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
}
# else
MOZ_CRASH("BaseCompiler platform hook: emitQuotientI64");
# endif
}
void
BaseCompiler::emitQuotientU64()
@@ -5515,22 +5541,22 @@ BaseCompiler::emitQuotientU64()
if (popConstPositivePowerOfTwoI64(&c, &power, 0)) {
if (power != 0) {
RegI64 r = popI64();
masm.rshift64(Imm32(power & 63), r);
pushI64(r);
}
} else {
bool isConst = peekConstI64(&c);
- RegI64 r0, r1, reserved;
- pop2xI64ForDivI64(&r0, &r1, &reserved);
- quotientI64(r1, r0, reserved, IsUnsigned(true), isConst, c);
+ RegI64 r, rs, reserved;
+ pop2xI64ForDivI64(&r, &rs, &reserved);
+ quotientI64(rs, r, reserved, IsUnsigned(true), isConst, c);
maybeFreeI64(reserved);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
}
# else
MOZ_CRASH("BaseCompiler platform hook: emitQuotientU64");
# endif
}
void
BaseCompiler::emitRemainderI64()
@@ -5551,22 +5577,22 @@ BaseCompiler::emitRemainderI64()
masm.rshift64Arithmetic(Imm32(power & 63), temp);
masm.lshift64(Imm32(power & 63), temp);
masm.sub64(temp, r);
freeI64(temp);
pushI64(r);
} else {
bool isConst = peekConstI64(&c);
- RegI64 r0, r1, reserved;
- pop2xI64ForDivI64(&r0, &r1, &reserved);
- remainderI64(r1, r0, reserved, IsUnsigned(false), isConst, c);
+ RegI64 r, rs, reserved;
+ pop2xI64ForDivI64(&r, &rs, &reserved);
+ remainderI64(rs, r, reserved, IsUnsigned(false), isConst, c);
maybeFreeI64(reserved);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
}
# else
MOZ_CRASH("BaseCompiler platform hook: emitRemainderI64");
# endif
}
void
BaseCompiler::emitRemainderU64()
@@ -5575,627 +5601,627 @@ BaseCompiler::emitRemainderU64()
int64_t c;
uint_fast8_t power;
if (popConstPositivePowerOfTwoI64(&c, &power, 1)) {
RegI64 r = popI64();
masm.and64(Imm64(c-1), r);
pushI64(r);
} else {
bool isConst = peekConstI64(&c);
- RegI64 r0, r1, reserved;
- pop2xI64ForDivI64(&r0, &r1, &reserved);
- remainderI64(r1, r0, reserved, IsUnsigned(true), isConst, c);
+ RegI64 r, rs, reserved;
+ pop2xI64ForDivI64(&r, &rs, &reserved);
+ remainderI64(rs, r, reserved, IsUnsigned(true), isConst, c);
maybeFreeI64(reserved);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
}
# else
MOZ_CRASH("BaseCompiler platform hook: emitRemainderU64");
# endif
}
#endif // RABALDR_INT_DIV_I64_CALLOUT
void
BaseCompiler::emitDivideF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- masm.divFloat32(r1, r0);
- freeF32(r1);
- pushF32(r0);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
+ masm.divFloat32(rs, r);
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitDivideF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- masm.divDouble(r1, r0);
- freeF64(r1);
- pushF64(r0);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
+ masm.divDouble(rs, r);
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitMinF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
// Convert signaling NaN to quiet NaNs.
//
// TODO / OPTIMIZE (bug 1316824): Don't do this if one of the operands
// is known to be a constant.
ScratchF32 zero(*this);
moveImmF32(0.f, zero);
- masm.subFloat32(zero, r0);
- masm.subFloat32(zero, r1);
- masm.minFloat32(r1, r0, HandleNaNSpecially(true));
- freeF32(r1);
- pushF32(r0);
+ masm.subFloat32(zero, r);
+ masm.subFloat32(zero, rs);
+ masm.minFloat32(rs, r, HandleNaNSpecially(true));
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitMaxF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
// Convert signaling NaN to quiet NaNs.
//
// TODO / OPTIMIZE (bug 1316824): see comment in emitMinF32.
ScratchF32 zero(*this);
moveImmF32(0.f, zero);
- masm.subFloat32(zero, r0);
- masm.subFloat32(zero, r1);
- masm.maxFloat32(r1, r0, HandleNaNSpecially(true));
- freeF32(r1);
- pushF32(r0);
+ masm.subFloat32(zero, r);
+ masm.subFloat32(zero, rs);
+ masm.maxFloat32(rs, r, HandleNaNSpecially(true));
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitMinF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
// Convert signaling NaN to quiet NaNs.
//
// TODO / OPTIMIZE (bug 1316824): see comment in emitMinF32.
ScratchF64 zero(*this);
moveImmF64(0, zero);
- masm.subDouble(zero, r0);
- masm.subDouble(zero, r1);
- masm.minDouble(r1, r0, HandleNaNSpecially(true));
- freeF64(r1);
- pushF64(r0);
+ masm.subDouble(zero, r);
+ masm.subDouble(zero, rs);
+ masm.minDouble(rs, r, HandleNaNSpecially(true));
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitMaxF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
// Convert signaling NaN to quiet NaNs.
//
// TODO / OPTIMIZE (bug 1316824): see comment in emitMinF32.
ScratchF64 zero(*this);
moveImmF64(0, zero);
- masm.subDouble(zero, r0);
- masm.subDouble(zero, r1);
- masm.maxDouble(r1, r0, HandleNaNSpecially(true));
- freeF64(r1);
- pushF64(r0);
+ masm.subDouble(zero, r);
+ masm.subDouble(zero, rs);
+ masm.maxDouble(rs, r, HandleNaNSpecially(true));
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitCopysignF32()
{
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- RegI32 i0 = needI32();
- RegI32 i1 = needI32();
- masm.moveFloat32ToGPR(r0, i0);
- masm.moveFloat32ToGPR(r1, i1);
- masm.and32(Imm32(INT32_MAX), i0);
- masm.and32(Imm32(INT32_MIN), i1);
- masm.or32(i1, i0);
- masm.moveGPRToFloat32(i0, r0);
- freeI32(i0);
- freeI32(i1);
- freeF32(r1);
- pushF32(r0);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
+ RegI32 temp0 = needI32();
+ RegI32 temp1 = needI32();
+ masm.moveFloat32ToGPR(r, temp0);
+ masm.moveFloat32ToGPR(rs, temp1);
+ masm.and32(Imm32(INT32_MAX), temp0);
+ masm.and32(Imm32(INT32_MIN), temp1);
+ masm.or32(temp1, temp0);
+ masm.moveGPRToFloat32(temp0, r);
+ freeI32(temp0);
+ freeI32(temp1);
+ freeF32(rs);
+ pushF32(r);
}
void
BaseCompiler::emitCopysignF64()
{
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- RegI64 x0 = needI64();
- RegI64 x1 = needI64();
- masm.moveDoubleToGPR64(r0, x0);
- masm.moveDoubleToGPR64(r1, x1);
- masm.and64(Imm64(INT64_MAX), x0);
- masm.and64(Imm64(INT64_MIN), x1);
- masm.or64(x1, x0);
- masm.moveGPR64ToDouble(x0, r0);
- freeI64(x0);
- freeI64(x1);
- freeF64(r1);
- pushF64(r0);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
+ RegI64 temp0 = needI64();
+ RegI64 temp1 = needI64();
+ masm.moveDoubleToGPR64(r, temp0);
+ masm.moveDoubleToGPR64(rs, temp1);
+ masm.and64(Imm64(INT64_MAX), temp0);
+ masm.and64(Imm64(INT64_MIN), temp1);
+ masm.or64(temp1, temp0);
+ masm.moveGPR64ToDouble(temp0, r);
+ freeI64(temp0);
+ freeI64(temp1);
+ freeF64(rs);
+ pushF64(r);
}
void
BaseCompiler::emitOrI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.or32(Imm32(c), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.or32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.or32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitOrI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.or64(Imm64(c), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.or64(r1, r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.or64(rs, r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitAndI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.and32(Imm32(c), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.and32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.and32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitAndI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.and64(Imm64(c), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.and64(r1, r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.and64(rs, r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitXorI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.xor32(Imm32(c), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.xor32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.xor32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitXorI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.xor64(Imm64(c), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.xor64(r1, r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.xor64(rs, r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitShlI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.lshift32(Imm32(c & 31), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32ForShiftOrRotate(&r0, &r1);
- maskShiftCount32(r1);
- masm.lshift32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32ForShiftOrRotate(&r, &rs);
+ maskShiftCount32(rs);
+ masm.lshift32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitShlI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.lshift64(Imm32(c & 63), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64ForShiftOrRotate(&r0, &r1);
- masm.lshift64(lowPart(r1), r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64ForShiftOrRotate(&r, &rs);
+ masm.lshift64(lowPart(rs), r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitShrI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.rshift32Arithmetic(Imm32(c & 31), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32ForShiftOrRotate(&r0, &r1);
- maskShiftCount32(r1);
- masm.rshift32Arithmetic(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32ForShiftOrRotate(&r, &rs);
+ maskShiftCount32(rs);
+ masm.rshift32Arithmetic(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitShrI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.rshift64Arithmetic(Imm32(c & 63), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64ForShiftOrRotate(&r0, &r1);
- masm.rshift64Arithmetic(lowPart(r1), r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64ForShiftOrRotate(&r, &rs);
+ masm.rshift64Arithmetic(lowPart(rs), r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitShrU32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.rshift32(Imm32(c & 31), r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32ForShiftOrRotate(&r0, &r1);
- maskShiftCount32(r1);
- masm.rshift32(r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32ForShiftOrRotate(&r, &rs);
+ maskShiftCount32(rs);
+ masm.rshift32(rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitShrU64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
masm.rshift64(Imm32(c & 63), r);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64ForShiftOrRotate(&r0, &r1);
- masm.rshift64(lowPart(r1), r0);
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64ForShiftOrRotate(&r, &rs);
+ masm.rshift64(lowPart(rs), r);
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitRotrI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.rotateRight(Imm32(c & 31), r, r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32ForShiftOrRotate(&r0, &r1);
- masm.rotateRight(r1, r0, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32ForShiftOrRotate(&r, &rs);
+ masm.rotateRight(rs, r, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitRotrI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
RegI32 temp = needRotate64Temp();
masm.rotateRight64(Imm32(c & 63), r, r, temp);
maybeFreeI32(temp);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64ForShiftOrRotate(&r0, &r1);
- masm.rotateRight64(lowPart(r1), r0, r0, maybeHighPart(r1));
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64ForShiftOrRotate(&r, &rs);
+ masm.rotateRight64(lowPart(rs), r, r, maybeHighPart(rs));
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitRotlI32()
{
int32_t c;
if (popConstI32(&c)) {
RegI32 r = popI32();
masm.rotateLeft(Imm32(c & 31), r, r);
pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32ForShiftOrRotate(&r0, &r1);
- masm.rotateLeft(r1, r0, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32ForShiftOrRotate(&r, &rs);
+ masm.rotateLeft(rs, r, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitRotlI64()
{
int64_t c;
if (popConstI64(&c)) {
RegI64 r = popI64();
RegI32 temp = needRotate64Temp();
masm.rotateLeft64(Imm32(c & 63), r, r, temp);
maybeFreeI32(temp);
pushI64(r);
} else {
- RegI64 r0, r1;
- pop2xI64ForShiftOrRotate(&r0, &r1);
- masm.rotateLeft64(lowPart(r1), r0, r0, maybeHighPart(r1));
- freeI64(r1);
- pushI64(r0);
+ RegI64 r, rs;
+ pop2xI64ForShiftOrRotate(&r, &rs);
+ masm.rotateLeft64(lowPart(rs), r, r, maybeHighPart(rs));
+ freeI64(rs);
+ pushI64(r);
}
}
void
BaseCompiler::emitEqzI32()
{
if (sniffConditionalControlEqz(ValType::I32))
return;
- RegI32 r0 = popI32();
- masm.cmp32Set(Assembler::Equal, r0, Imm32(0), r0);
- pushI32(r0);
+ RegI32 r = popI32();
+ masm.cmp32Set(Assembler::Equal, r, Imm32(0), r);
+ pushI32(r);
}
void
BaseCompiler::emitEqzI64()
{
if (sniffConditionalControlEqz(ValType::I64))
return;
- RegI64 r0 = popI64();
- RegI32 i0 = fromI64(r0);
- eqz64(r0, i0);
- freeI64Except(r0, i0);
- pushI32(i0);
+ RegI64 rs = popI64();
+ RegI32 rd = fromI64(rs);
+ eqz64(rs, rd);
+ freeI64Except(rs, rd);
+ pushI32(rd);
}
void
BaseCompiler::emitClzI32()
{
- RegI32 r0 = popI32();
- masm.clz32(r0, r0, IsKnownNotZero(false));
- pushI32(r0);
+ RegI32 r = popI32();
+ masm.clz32(r, r, IsKnownNotZero(false));
+ pushI32(r);
}
void
BaseCompiler::emitClzI64()
{
- RegI64 r0 = popI64();
- masm.clz64(r0, lowPart(r0));
- maybeClearHighPart(r0);
- pushI64(r0);
+ RegI64 r = popI64();
+ masm.clz64(r, lowPart(r));
+ maybeClearHighPart(r);
+ pushI64(r);
}
void
BaseCompiler::emitCtzI32()
{
- RegI32 r0 = popI32();
- masm.ctz32(r0, r0, IsKnownNotZero(false));
- pushI32(r0);
+ RegI32 r = popI32();
+ masm.ctz32(r, r, IsKnownNotZero(false));
+ pushI32(r);
}
void
BaseCompiler::emitCtzI64()
{
- RegI64 r0 = popI64();
- masm.ctz64(r0, lowPart(r0));
- maybeClearHighPart(r0);
- pushI64(r0);
+ RegI64 r = popI64();
+ masm.ctz64(r, lowPart(r));
+ maybeClearHighPart(r);
+ pushI64(r);
}
void
BaseCompiler::emitPopcntI32()
{
- RegI32 r0 = popI32();
- RegI32 tmp = needPopcnt32Temp();
- masm.popcnt32(r0, r0, tmp);
- maybeFreeI32(tmp);
- pushI32(r0);
+ RegI32 r = popI32();
+ RegI32 temp = needPopcnt32Temp();
+ masm.popcnt32(r, r, temp);
+ maybeFreeI32(temp);
+ pushI32(r);
}
void
BaseCompiler::emitPopcntI64()
{
- RegI64 r0 = popI64();
- RegI32 tmp = needPopcnt64Temp();
- masm.popcnt64(r0, r0, tmp);
- maybeFreeI32(tmp);
- pushI64(r0);
+ RegI64 r = popI64();
+ RegI32 temp = needPopcnt64Temp();
+ masm.popcnt64(r, r, temp);
+ maybeFreeI32(temp);
+ pushI64(r);
}
void
BaseCompiler::emitAbsF32()
{
- RegF32 r0 = popF32();
- masm.absFloat32(r0, r0);
- pushF32(r0);
+ RegF32 r = popF32();
+ masm.absFloat32(r, r);
+ pushF32(r);
}
void
BaseCompiler::emitAbsF64()
{
- RegF64 r0 = popF64();
- masm.absDouble(r0, r0);
- pushF64(r0);
+ RegF64 r = popF64();
+ masm.absDouble(r, r);
+ pushF64(r);
}
void
BaseCompiler::emitNegateF32()
{
- RegF32 r0 = popF32();
- masm.negateFloat(r0);
- pushF32(r0);
+ RegF32 r = popF32();
+ masm.negateFloat(r);
+ pushF32(r);
}
void
BaseCompiler::emitNegateF64()
{
- RegF64 r0 = popF64();
- masm.negateDouble(r0);
- pushF64(r0);
+ RegF64 r = popF64();
+ masm.negateDouble(r);
+ pushF64(r);
}
void
BaseCompiler::emitSqrtF32()
{
- RegF32 r0 = popF32();
- masm.sqrtFloat32(r0, r0);
- pushF32(r0);
+ RegF32 r = popF32();
+ masm.sqrtFloat32(r, r);
+ pushF32(r);
}
void
BaseCompiler::emitSqrtF64()
{
- RegF64 r0 = popF64();
- masm.sqrtDouble(r0, r0);
- pushF64(r0);
+ RegF64 r = popF64();
+ masm.sqrtDouble(r, r);
+ pushF64(r);
}
template<bool isUnsigned>
bool
BaseCompiler::emitTruncateF32ToI32()
{
- RegF32 r0 = popF32();
- RegI32 i0 = needI32();
- if (!truncateF32ToI32(r0, i0, isUnsigned))
+ RegF32 rs = popF32();
+ RegI32 rd = needI32();
+ if (!truncateF32ToI32(rs, rd, isUnsigned))
return false;
- freeF32(r0);
- pushI32(i0);
+ freeF32(rs);
+ pushI32(rd);
return true;
}
template<bool isUnsigned>
bool
BaseCompiler::emitTruncateF64ToI32()
{
- RegF64 r0 = popF64();
- RegI32 i0 = needI32();
- if (!truncateF64ToI32(r0, i0, isUnsigned))
+ RegF64 rs = popF64();
+ RegI32 rd = needI32();
+ if (!truncateF64ToI32(rs, rd, isUnsigned))
return false;
- freeF64(r0);
- pushI32(i0);
+ freeF64(rs);
+ pushI32(rd);
return true;
}
#ifndef RABALDR_FLOAT_TO_I64_CALLOUT
template<bool isUnsigned>
bool
BaseCompiler::emitTruncateF32ToI64()
{
- RegF32 r0 = popF32();
- RegI64 x0 = needI64();
- RegF64 tmp = needTempForFloatingToI64(isUnsigned);
- if (!truncateF32ToI64(r0, x0, isUnsigned, tmp))
+ RegF32 rs = popF32();
+ RegI64 rd = needI64();
+ RegF64 temp = needTempForFloatingToI64(isUnsigned);
+ if (!truncateF32ToI64(rs, rd, isUnsigned, temp))
return false;
- maybeFreeF64(tmp);
- freeF32(r0);
- pushI64(x0);
+ maybeFreeF64(temp);
+ freeF32(rs);
+ pushI64(rd);
return true;
}
template<bool isUnsigned>
bool
BaseCompiler::emitTruncateF64ToI64()
{
- RegF64 r0 = popF64();
- RegI64 x0 = needI64();
- RegF64 tmp = needTempForFloatingToI64(isUnsigned);
- if (!truncateF64ToI64(r0, x0, isUnsigned, tmp))
+ RegF64 rs = popF64();
+ RegI64 rd = needI64();
+ RegF64 temp = needTempForFloatingToI64(isUnsigned);
+ if (!truncateF64ToI64(rs, rd, isUnsigned, temp))
return false;
- maybeFreeF64(tmp);
- freeF64(r0);
- pushI64(x0);
+ maybeFreeF64(temp);
+ freeF64(rs);
+ pushI64(rd);
return true;
}
#endif // RABALDR_FLOAT_TO_I64_CALLOUT
void
BaseCompiler::emitWrapI64ToI32()
{
- RegI64 r0 = popI64();
- RegI32 i0 = fromI64(r0);
- masm.move64To32(r0, i0);
- freeI64Except(r0, i0);
- pushI32(i0);
+ RegI64 rs = popI64();
+ RegI32 rd = fromI64(rs);
+ masm.move64To32(rs, rd);
+ freeI64Except(rs, rd);
+ pushI32(rd);
}
void
BaseCompiler::emitExtendI32_8()
{
RegI32 r = popI32();
masm.move8SignExtend(r, r);
pushI32(r);
@@ -6234,177 +6260,177 @@ BaseCompiler::emitExtendI64_32()
popI64ForSignExtendI64(&r);
masm.move32To64SignExtend(lowPart(r), r);
pushI64(r);
}
void
BaseCompiler::emitExtendI32ToI64()
{
- RegI64 x0;
- popI32ForSignExtendI64(&x0);
- masm.move32To64SignExtend(lowPart(x0), x0);
- pushI64(x0);
+ RegI64 r;
+ popI32ForSignExtendI64(&r);
+ masm.move32To64SignExtend(lowPart(r), r);
+ pushI64(r);
}
void
BaseCompiler::emitExtendU32ToI64()
{
- RegI32 r0 = popI32();
- RegI64 x0 = widenI32(r0);
- masm.move32To64ZeroExtend(r0, x0);
- pushI64(x0);
+ RegI32 rs = popI32();
+ RegI64 rd = widenI32(rs);
+ masm.move32To64ZeroExtend(rs, rd);
+ pushI64(rd);
}
void
BaseCompiler::emitReinterpretF32AsI32()
{
- RegF32 r0 = popF32();
- RegI32 i0 = needI32();
- masm.moveFloat32ToGPR(r0, i0);
- freeF32(r0);
- pushI32(i0);
+ RegF32 rs = popF32();
+ RegI32 rd = needI32();
+ masm.moveFloat32ToGPR(rs, rd);
+ freeF32(rs);
+ pushI32(rd);
}
void
BaseCompiler::emitReinterpretF64AsI64()
{
- RegF64 r0 = popF64();
- RegI64 x0 = needI64();
- masm.moveDoubleToGPR64(r0, x0);
- freeF64(r0);
- pushI64(x0);
+ RegF64 rs = popF64();
+ RegI64 rd = needI64();
+ masm.moveDoubleToGPR64(rs, rd);
+ freeF64(rs);
+ pushI64(rd);
}
void
BaseCompiler::emitConvertF64ToF32()
{
- RegF64 r0 = popF64();
- RegF32 f0 = needF32();
- masm.convertDoubleToFloat32(r0, f0);
- freeF64(r0);
- pushF32(f0);
+ RegF64 rs = popF64();
+ RegF32 rd = needF32();
+ masm.convertDoubleToFloat32(rs, rd);
+ freeF64(rs);
+ pushF32(rd);
}
void
BaseCompiler::emitConvertI32ToF32()
{
- RegI32 r0 = popI32();
- RegF32 f0 = needF32();
- masm.convertInt32ToFloat32(r0, f0);
- freeI32(r0);
- pushF32(f0);
+ RegI32 rs = popI32();
+ RegF32 rd = needF32();
+ masm.convertInt32ToFloat32(rs, rd);
+ freeI32(rs);
+ pushF32(rd);
}
void
BaseCompiler::emitConvertU32ToF32()
{
- RegI32 r0 = popI32();
- RegF32 f0 = needF32();
- masm.convertUInt32ToFloat32(r0, f0);
- freeI32(r0);
- pushF32(f0);
+ RegI32 rs = popI32();
+ RegF32 rd = needF32();
+ masm.convertUInt32ToFloat32(rs, rd);
+ freeI32(rs);
+ pushF32(rd);
}
#ifndef RABALDR_I64_TO_FLOAT_CALLOUT
void
BaseCompiler::emitConvertI64ToF32()
{
- RegI64 r0 = popI64();
- RegF32 f0 = needF32();
- convertI64ToF32(r0, IsUnsigned(false), f0, RegI32());
- freeI64(r0);
- pushF32(f0);
+ RegI64 rs = popI64();
+ RegF32 rd = needF32();
+ convertI64ToF32(rs, IsUnsigned(false), rd, RegI32());
+ freeI64(rs);
+ pushF32(rd);
}
void
BaseCompiler::emitConvertU64ToF32()
{
- RegI64 r0 = popI64();
- RegF32 f0 = needF32();
+ RegI64 rs = popI64();
+ RegF32 rd = needF32();
RegI32 temp = needConvertI64ToFloatTemp(ValType::F32, IsUnsigned(true));
- convertI64ToF32(r0, IsUnsigned(true), f0, temp);
+ convertI64ToF32(rs, IsUnsigned(true), rd, temp);
maybeFreeI32(temp);
- freeI64(r0);
- pushF32(f0);
+ freeI64(rs);
+ pushF32(rd);
}
#endif
void
BaseCompiler::emitConvertF32ToF64()
{
- RegF32 r0 = popF32();
- RegF64 d0 = needF64();
- masm.convertFloat32ToDouble(r0, d0);
- freeF32(r0);
- pushF64(d0);
+ RegF32 rs = popF32();
+ RegF64 rd = needF64();
+ masm.convertFloat32ToDouble(rs, rd);
+ freeF32(rs);
+ pushF64(rd);
}
void
BaseCompiler::emitConvertI32ToF64()
{
- RegI32 r0 = popI32();
- RegF64 d0 = needF64();
- masm.convertInt32ToDouble(r0, d0);
- freeI32(r0);
- pushF64(d0);
+ RegI32 rs = popI32();
+ RegF64 rd = needF64();
+ masm.convertInt32ToDouble(rs, rd);
+ freeI32(rs);
+ pushF64(rd);
}
void
BaseCompiler::emitConvertU32ToF64()
{
- RegI32 r0 = popI32();
- RegF64 d0 = needF64();
- masm.convertUInt32ToDouble(r0, d0);
- freeI32(r0);
- pushF64(d0);
+ RegI32 rs = popI32();
+ RegF64 rd = needF64();
+ masm.convertUInt32ToDouble(rs, rd);
+ freeI32(rs);
+ pushF64(rd);
}
#ifndef RABALDR_I64_TO_FLOAT_CALLOUT
void
BaseCompiler::emitConvertI64ToF64()
{
- RegI64 r0 = popI64();
- RegF64 d0 = needF64();
- convertI64ToF64(r0, IsUnsigned(false), d0, RegI32());
- freeI64(r0);
- pushF64(d0);
+ RegI64 rs = popI64();
+ RegF64 rd = needF64();
+ convertI64ToF64(rs, IsUnsigned(false), rd, RegI32());
+ freeI64(rs);
+ pushF64(rd);
}
void
BaseCompiler::emitConvertU64ToF64()
{
- RegI64 r0 = popI64();
- RegF64 d0 = needF64();
+ RegI64 rs = popI64();
+ RegF64 rd = needF64();
RegI32 temp = needConvertI64ToFloatTemp(ValType::F64, IsUnsigned(true));
- convertI64ToF64(r0, IsUnsigned(true), d0, temp);
+ convertI64ToF64(rs, IsUnsigned(true), rd, temp);
maybeFreeI32(temp);
- freeI64(r0);
- pushF64(d0);
+ freeI64(rs);
+ pushF64(rd);
}
#endif // RABALDR_I64_TO_FLOAT_CALLOUT
void
BaseCompiler::emitReinterpretI32AsF32()
{
- RegI32 r0 = popI32();
- RegF32 f0 = needF32();
- masm.moveGPRToFloat32(r0, f0);
- freeI32(r0);
- pushF32(f0);
+ RegI32 rs = popI32();
+ RegF32 rd = needF32();
+ masm.moveGPRToFloat32(rs, rd);
+ freeI32(rs);
+ pushF32(rd);
}
void
BaseCompiler::emitReinterpretI64AsF64()
{
- RegI64 r0 = popI64();
- RegF64 d0 = needF64();
- masm.moveGPR64ToDouble(r0, d0);
- freeI64(r0);
- pushF64(d0);
+ RegI64 rs = popI64();
+ RegF64 rd = needF64();
+ masm.moveGPR64ToDouble(rs, rd);
+ freeI64(rs);
+ pushF64(rd);
}
template<typename Cond>
bool
BaseCompiler::sniffConditionalControlCmp(Cond compareOp, ValType operandType)
{
MOZ_ASSERT(latentOp_ == LatentOp::None, "Latent comparison state not properly reset");
@@ -7643,19 +7669,19 @@ BaseCompiler::emitSetGlobal()
// TODO / OPTIMIZE (bug 1329576): There are opportunities to generate better
// code by not moving a constant address with a zero offset into a register.
RegI32
BaseCompiler::popMemoryAccess(MemoryAccessDesc* access, AccessCheck* check)
{
check->onlyPointerAlignment = (access->offset() & (access->byteSize() - 1)) == 0;
- int32_t addrTmp;
- if (popConstI32(&addrTmp)) {
- uint32_t addr = addrTmp;
+ int32_t addrTemp;
+ if (popConstI32(&addrTemp)) {
+ uint32_t addr = addrTemp;
uint64_t ea = uint64_t(addr) + uint64_t(access->offset());
uint64_t limit = uint64_t(env_.minMemoryLength) + uint64_t(wasm::OffsetGuardLimit);
check->omitBoundsCheck = ea < limit;
check->omitAlignmentCheck = (ea & (access->byteSize() - 1)) == 0;
// Fold the offset into the pointer if we can, as this is always
@@ -7699,29 +7725,29 @@ BaseCompiler::maybeLoadTlsForAccess(cons
return RegI32::Invalid();
}
bool
BaseCompiler::loadCommon(MemoryAccessDesc* access, ValType type)
{
AccessCheck check;
- RegI32 tls, tmp1, tmp2, tmp3;
- needLoadTemps(*access, &tmp1, &tmp2, &tmp3);
+ RegI32 tls, temp1, temp2, temp3;
+ needLoadTemps(*access, &temp1, &temp2, &temp3);
switch (type) {
case ValType::I32: {
RegI32 rp = popMemoryAccess(access, &check);
#ifdef JS_CODEGEN_ARM
RegI32 rv = IsUnaligned(*access) ? needI32() : rp;
#else
RegI32 rv = rp;
#endif
tls = maybeLoadTlsForAccess(check);
- if (!load(access, &check, tls, rp, AnyReg(rv), tmp1, tmp2, tmp3))
+ if (!load(access, &check, tls, rp, AnyReg(rv), temp1, temp2, temp3))
return false;
pushI32(rv);
if (rp != rv)
freeI32(rp);
break;
}
case ValType::I64: {
RegI64 rv;
@@ -7730,51 +7756,51 @@ BaseCompiler::loadCommon(MemoryAccessDes
rv = specific.abiReturnRegI64;
needI64(rv);
rp = popMemoryAccess(access, &check);
#else
rp = popMemoryAccess(access, &check);
rv = needI64();
#endif
tls = maybeLoadTlsForAccess(check);
- if (!load(access, &check, tls, rp, AnyReg(rv), tmp1, tmp2, tmp3))
+ if (!load(access, &check, tls, rp, AnyReg(rv), temp1, temp2, temp3))
return false;
pushI64(rv);
freeI32(rp);
break;
}
case ValType::F32: {
RegI32 rp = popMemoryAccess(access, &check);
RegF32 rv = needF32();
tls = maybeLoadTlsForAccess(check);
- if (!load(access, &check, tls, rp, AnyReg(rv), tmp1, tmp2, tmp3))
+ if (!load(access, &check, tls, rp, AnyReg(rv), temp1, temp2, temp3))
return false;
pushF32(rv);
freeI32(rp);
break;
}
case ValType::F64: {
RegI32 rp = popMemoryAccess(access, &check);
RegF64 rv = needF64();
tls = maybeLoadTlsForAccess(check);
- if (!load(access, &check, tls, rp, AnyReg(rv), tmp1, tmp2, tmp3))
+ if (!load(access, &check, tls, rp, AnyReg(rv), temp1, temp2, temp3))
return false;
pushF64(rv);
freeI32(rp);
break;
}
default:
MOZ_CRASH("load type");
break;
}
maybeFreeI32(tls);
- maybeFreeI32(tmp1);
- maybeFreeI32(tmp2);
- maybeFreeI32(tmp3);
+ maybeFreeI32(temp1);
+ maybeFreeI32(temp2);
+ maybeFreeI32(temp3);
return true;
}
bool
BaseCompiler::emitLoad(ValType type, Scalar::Type viewType)
{
LinearMemoryAddress<Nothing> addr;
@@ -7789,66 +7815,66 @@ BaseCompiler::emitLoad(ValType type, Sca
}
bool
BaseCompiler::storeCommon(MemoryAccessDesc* access, ValType resultType)
{
AccessCheck check;
RegI32 tls;
- RegI32 tmp = needStoreTemp(*access, resultType);
+ RegI32 temp = needStoreTemp(*access, resultType);
switch (resultType) {
case ValType::I32: {
RegI32 rv = popI32();
RegI32 rp = popMemoryAccess(access, &check);
tls = maybeLoadTlsForAccess(check);
- if (!store(access, &check, tls, rp, AnyReg(rv), tmp))
+ if (!store(access, &check, tls, rp, AnyReg(rv), temp))
return false;
freeI32(rp);
freeI32(rv);
break;
}
case ValType::I64: {
RegI64 rv = popI64();
RegI32 rp = popMemoryAccess(access, &check);
tls = maybeLoadTlsForAccess(check);
- if (!store(access, &check, tls, rp, AnyReg(rv), tmp))
+ if (!store(access, &check, tls, rp, AnyReg(rv), temp))
return false;
freeI32(rp);
freeI64(rv);
break;
}
case ValType::F32: {
RegF32 rv = popF32();
RegI32 rp = popMemoryAccess(access, &check);
tls = maybeLoadTlsForAccess(check);
- if (!store(access, &check, tls, rp, AnyReg(rv), tmp))
+ if (!store(access, &check, tls, rp, AnyReg(rv), temp))
return false;
freeI32(rp);
freeF32(rv);
break;
}
case ValType::F64: {
RegF64 rv = popF64();
RegI32 rp = popMemoryAccess(access, &check);
tls = maybeLoadTlsForAccess(check);
- if (!store(access, &check, tls, rp, AnyReg(rv), tmp))
+ if (!store(access, &check, tls, rp, AnyReg(rv), temp))
return false;
freeI32(rp);
freeF64(rv);
break;
}
default:
MOZ_CRASH("store type");
break;
}
maybeFreeI32(tls);
- maybeFreeI32(tmp);
+ maybeFreeI32(temp);
return true;
}
bool
BaseCompiler::emitStore(ValType resultType, Scalar::Type viewType)
{
LinearMemoryAddress<Nothing> addr;
@@ -7881,80 +7907,80 @@ BaseCompiler::emitSelect()
// I32 condition on top, then false, then true.
Label done;
BranchState b(&done);
emitBranchSetup(&b);
switch (NonAnyToValType(type)) {
case ValType::I32: {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
emitBranchPerform(&b);
- moveI32(r1, r0);
+ moveI32(rs, r);
masm.bind(&done);
- freeI32(r1);
- pushI32(r0);
+ freeI32(rs);
+ pushI32(r);
break;
}
case ValType::I64: {
#ifdef JS_CODEGEN_X86
// There may be as many as four Int64 values in registers at a time: two
// for the latent branch operands, and two for the true/false values we
// normally pop before executing the branch. On x86 this is one value
// too many, so we need to generate more complicated code here, and for
// simplicity's sake we do so even if the branch operands are not Int64.
// However, the resulting control flow diamond is complicated since the
// arms of the diamond will have to stay synchronized with respect to
// their evaluation stack and regalloc state. To simplify further, we
// use a double branch and a temporary boolean value for now.
- RegI32 tmp = needI32();
- moveImm32(0, tmp);
+ RegI32 temp = needI32();
+ moveImm32(0, temp);
emitBranchPerform(&b);
- moveImm32(1, tmp);
+ moveImm32(1, temp);
masm.bind(&done);
Label trueValue;
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- masm.branch32(Assembler::Equal, tmp, Imm32(0), &trueValue);
- moveI64(r1, r0);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
+ masm.branch32(Assembler::Equal, temp, Imm32(0), &trueValue);
+ moveI64(rs, r);
masm.bind(&trueValue);
- freeI32(tmp);
- freeI64(r1);
- pushI64(r0);
+ freeI32(temp);
+ freeI64(rs);
+ pushI64(r);
#else
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
+ RegI64 r, rs;
+ pop2xI64(&r, &rs);
emitBranchPerform(&b);
- moveI64(r1, r0);
+ moveI64(rs, r);
masm.bind(&done);
- freeI64(r1);
- pushI64(r0);
+ freeI64(rs);
+ pushI64(r);
#endif
break;
}
case ValType::F32: {
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
+ RegF32 r, rs;
+ pop2xF32(&r, &rs);
emitBranchPerform(&b);
- moveF32(r1, r0);
+ moveF32(rs, r);
masm.bind(&done);
- freeF32(r1);
- pushF32(r0);
+ freeF32(rs);
+ pushF32(r);
break;
}
case ValType::F64: {
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
+ RegF64 r, rs;
+ pop2xF64(&r, &rs);
emitBranchPerform(&b);
- moveF64(r1, r0);
+ moveF64(rs, r);
masm.bind(&done);
- freeF64(r1);
- pushF64(r0);
+ freeF64(rs);
+ pushF64(r);
break;
}
default: {
MOZ_CRASH("select type");
}
}
return true;
@@ -7965,85 +7991,85 @@ BaseCompiler::emitCompareI32(Assembler::
{
MOZ_ASSERT(compareType == ValType::I32);
if (sniffConditionalControlCmp(compareOp, compareType))
return;
int32_t c;
if (popConstI32(&c)) {
- RegI32 r0 = popI32();
- masm.cmp32Set(compareOp, r0, Imm32(c), r0);
- pushI32(r0);
+ RegI32 r = popI32();
+ masm.cmp32Set(compareOp, r, Imm32(c), r);
+ pushI32(r);
} else {
- RegI32 r0, r1;
- pop2xI32(&r0, &r1);
- masm.cmp32Set(compareOp, r0, r1, r0);
- freeI32(r1);
- pushI32(r0);
+ RegI32 r, rs;
+ pop2xI32(&r, &rs);
+ masm.cmp32Set(compareOp, r, rs, r);
+ freeI32(rs);
+ pushI32(r);
}
}
void
BaseCompiler::emitCompareI64(Assembler::Condition compareOp, ValType compareType)
{
MOZ_ASSERT(compareType == ValType::I64);
if (sniffConditionalControlCmp(compareOp, compareType))
return;
- RegI64 r0, r1;
- pop2xI64(&r0, &r1);
- RegI32 i0(fromI64(r0));
- cmp64Set(compareOp, r0, r1, i0);
- freeI64(r1);
- freeI64Except(r0, i0);
- pushI32(i0);
+ RegI64 rs0, rs1;
+ pop2xI64(&rs0, &rs1);
+ RegI32 rd(fromI64(rs0));
+ cmp64Set(compareOp, rs0, rs1, rd);
+ freeI64(rs1);
+ freeI64Except(rs0, rd);
+ pushI32(rd);
}
void
BaseCompiler::emitCompareF32(Assembler::DoubleCondition compareOp, ValType compareType)
{
MOZ_ASSERT(compareType == ValType::F32);
if (sniffConditionalControlCmp(compareOp, compareType))
return;
Label across;
- RegF32 r0, r1;
- pop2xF32(&r0, &r1);
- RegI32 i0 = needI32();
- moveImm32(1, i0);
- masm.branchFloat(compareOp, r0, r1, &across);
- moveImm32(0, i0);
+ RegF32 rs0, rs1;
+ pop2xF32(&rs0, &rs1);
+ RegI32 rd = needI32();
+ moveImm32(1, rd);
+ masm.branchFloat(compareOp, rs0, rs1, &across);
+ moveImm32(0, rd);
masm.bind(&across);
- freeF32(r0);
- freeF32(r1);
- pushI32(i0);
+ freeF32(rs0);
+ freeF32(rs1);
+ pushI32(rd);
}
void
BaseCompiler::emitCompareF64(Assembler::DoubleCondition compareOp, ValType compareType)
{
MOZ_ASSERT(compareType == ValType::F64);
if (sniffConditionalControlCmp(compareOp, compareType))
return;
Label across;
- RegF64 r0, r1;
- pop2xF64(&r0, &r1);
- RegI32 i0 = needI32();
- moveImm32(1, i0);
- masm.branchDouble(compareOp, r0, r1, &across);
- moveImm32(0, i0);
+ RegF64 rs0, rs1;
+ pop2xF64(&rs0, &rs1);
+ RegI32 rd = needI32();
+ moveImm32(1, rd);
+ masm.branchDouble(compareOp, rs0, rs1, &across);
+ moveImm32(0, rd);
masm.bind(&across);
- freeF64(r0);
- freeF64(r1);
- pushI32(i0);
+ freeF64(rs0);
+ freeF64(rs1);
+ pushI32(rd);
}
void
BaseCompiler::emitInstanceCall(uint32_t lineOrBytecode, const MIRTypeVector& sig,
ExprType retType, SymbolicAddress builtin)
{
MOZ_ASSERT(sig[0] == MIRType::Pointer);
